Many integrated circuit (IC) devices can be programmed. Examples of such programmable IC devices include some volatile and non-volatile memory devices, field programmable gate arrays ("FPGAs"), programmable logic devices ("PLDs"), and complex programmable logic devices ("CPLDs").
A programmable IC device typically includes a plurality of input/output (I/O) cells which are coupled to respective I/O pins for the receipt of input signals and the transmission of output signals. In operation, various output signals may be provided at the same or different times to several respective I/O cells. Numerous problems, however, are associated with such provision of output signals at the I/O cells.
For example, under certain circumstances, when several output signals are simultaneously provided to several respective I/O cells, there can be a degradation in the quality of these signals. Specifically, output bus lines external to a programmable logic device may be connected to the I/O cells. These output bus lines may be powered by a single power supply with a limited peak current capacity. As such, the simultaneous fast switching of several output signals may exceed the peak current capacity of the power supply, thus resulting in slow switching on all bus lines. Furthermore, the simultaneous switching of several output signals may create noise and interference in the output signals due to ground bounce and other phenomena.
Under other circumstances, it is desirable to have several output signals appear simultaneously at respective I/O cells. For example, a plurality of output signals may each convey one bit of the same multi-bit address, and thus, ideally, should be presented at the same time on respective I/O pins. In actual operation, however, such output signals are provided at different times due to internal delays within the programmable IC device.
A complex programmable IC device can be connected together with other devices on a printed circuit board. An inherent characteristic of circuit connects on such a board is that the amount of noise introduced into a signal is directly proportional to the length of a connection. Thus, longer connections can produce a degradation of quality in the transmission of signal transitions when slew rates are too fast. Accordingly, a reduction in slew rate would improve transition over long distances.
Another inherent characteristic of printed circuit board interconnects is that transmission delay of a signal is directly proportional to the trace length of a connection over which the signal travels. The trace lengths of various connections within the same bus can be different. Thus, even though the transition of signals conveyed over the same bus ideally should be concurrent, this is often not the case in actual application. Accordingly, delaying the output sources of various signals on a bus could result in a lessskewed transition of the signals at the respective destinations.